SUREQCLR=0, SQMON=0, CCPL=0, PID=00, BSTS=0, PBUSY=0, SQSET=0, SUREQ=0, SQCLR=0
DCP Control Register
| PID | Response PID 0 (00): NAK response 1 (01): BUF response (depending on the buffer state) 2 (10): STALL response 3 (11): STALL response |
| CCPL | Control Transfer End Enable 0 (0): Invalid 1 (1): Completion of control transfer is enabled. |
| Reserved | These bits are read as 00. The write value should be 00. |
| PBUSY | Pipe Busy 0 (0): DCP is not used for the transaction. 1 (1): DCP is used for the transaction. |
| SQMON | Sequence Toggle Bit Monitor 0 (0): DATA0 1 (1): DATA1 |
| SQSET | Sequence Toggle Bit Set 0 (0): Invalid 1 (1): Specifies DATA1. |
| SQCLR | Sequence Toggle Bit Clear 0 (0): Invalid 1 (1): Specifies DATA0. |
| Reserved | These bits are read as 00. The write value should be 00. |
| SUREQCLR | SUREQ Bit Clear 0 (0): Invalid 1 (1): Clears the SUREQ bit to 0. |
| Reserved | These bits are read as 00. The write value should be 00. |
| SUREQ | Setup Token Transmission 0 (0): Invalid 1 (1): Transmits the setup packet. |
| BSTS | Buffer Status 0 (0): Buffer access is disabled. 1 (1): Buffer access is enabled. |